The wafer that came off the line this month looked ordinary, but the transistors on it were not. ASML, TSMC and the research institute imec said they had integrated transistors built from two-dimensional materials at a 50-nanometer pitch on a standard 300-millimeter wafer for the first time, an advance reported by the chip-industry publication Bits&Chips.
The achievement matters because the industry is running out of room. For two decades, chipmakers shrank the transistor’s silicon channel until it reached a few atoms thick, and the FinFET design that has carried the industry through the past decade is approaching its physical limits at the smallest nodes. The three-way project is testing whether a different class of material can take over when silicon cannot.
Two-dimensional materials, often layered compounds just one atom thick, have been a staple of academic papers for years. The challenge was always practical: growing the material on production wafers, patterning it at the dimensions the industry needs, and doing it with equipment that already exists in fabs. The demonstration at 50-nanometer pitch, on 300-millimeter wafers, is evidence that the practical hurdles are being cleared, though volume production remains years away.
The materials at issue are compounds such as molybdenum disulfide, whose sheets are a single atom or a few atoms thick. Electrons move through such a channel with unusual efficiency, and the surrounding structure, called the gate, can control it even at dimensions where silicon’s performance collapses. That control is the property chipmakers are chasing: at the smallest nodes, the transistor’s ability to switch cleanly determines whether a chip saves power or wastes it.
The choice of partners is instructive. ASML supplies the lithography machines that pattern the wafers, imec runs the research line where the work was done, and TSMC is the world’s largest contract chipmaker, with the most to gain if the technology reaches production. Their collaboration suggests the work has moved beyond curiosity and into the phase where companies begin positioning for a transition.
The economics will decide the timeline. Building transistors from new materials requires changes in deposition, etching and contact formation, each of which costs billions to develop and validate. Foundries will not make that investment until they are confident the technology is needed, and that confidence depends on how quickly silicon-based designs hit their wall.
TSMC’s current business shows why the pressure is building. The company reported May revenue up 30% from a year earlier, according to Bloomberg, with growth driven almost entirely by orders for AI accelerators. Those chips use the most advanced nodes, and they are the first products that would need 2D transistors once current designs are exhausted.
The demand is also reshaping capacity. AI accelerators are consuming an increasing share of the most advanced wafer capacity, and executives have said the company is effectively sold out at the leading edge. If AI orders keep growing, TSMC will face a different problem than the one that has plagued the industry for years: not too little demand, but not enough factories to satisfy it.
The shift would also redistribute money across the supply chain. Deposition and etching tools, made by companies such as Applied Materials and Lam Research, would need new configurations to handle the new materials, and ASML’s lithography machines would face a new set of alignment challenges. Equipment makers have already begun adapting their portfolios, according to executives in the industry, a sign that they expect the transition to arrive.
That dynamic gives the 2D work an urgency it lacked a few years ago. When the industry believed silicon had another decade of scaling left, the new materials could wait. Now, with leading-edge capacity sold out and AI demand still climbing, the companies are treating the transition less as a distant problem and more as a risk they need to retire early.
The imec connection gives the project a research pipeline that commercial labs lack. The institute runs one of the few advanced wafer lines in the world that is not dedicated to a single company’s products, allowing experiments that would otherwise disrupt production schedules. Researchers there have said that production insertion, if the technology delivers, could come later this decade, though they caution that the gap between demonstration and manufacturing is where most transitions stall.
Skeptics note that similar claims have been made before. Carbon nanotubes, another exotic transistor material, drew years of research funding before fading from the main line of development, and 2D materials have inherited some of that skepticism. The difference this time, researchers said, is the involvement of production equipment makers and foundries at the outset, rather than universities working alone.
For now, the demonstration is a data point, not a product. But it is a data point that lets the industry plan: the road from paper to wafer has been traveled, and the remaining questions are about cost, yield and timing. In a market where the most advanced capacity is already sold out, those are questions worth answering.
