Intel plans to mass-produce a new advanced packaging technology called EMIB-T in 2027, and it says the approach will cost about 50% less than TSMC’s CoWoS, according to TechPowerUp. If the cost claim survives contact with the factory floor, it would be the first serious challenge to TSMC’s near-monopoly on the packaging that AI accelerators depend on.
Packaging has become one of the most important bottlenecks in the AI chip business. The fastest accelerators are no longer a single die; they are clusters of compute and memory tiles joined on a silicon interposer, and the technique of stitching them together determines performance, power, and cost. TSMC’s CoWoS has been the industry standard for this job, and demand for it has outstripped supply for years, with AI chipmakers competing for capacity like it was the chips themselves.
Intel’s pitch is simpler and cheaper. EMIB-T builds on the company’s existing embedded-bridge packaging, which it already uses in some of its own processors, and the new variant is aimed at the same class of work that CoWoS does. A 50% cost advantage at equivalent performance would be a genuinely disruptive offer in a market where capacity, not design, is the constraint.
The caveat is the manufacturing itself. XenoSpectrum, the outlet that flagged the yield dependency, notes that a cost advantage of that size depends on the technology hitting its yield targets, and advanced packaging is a manufacturing battle as much as an engineering one. A process that works in the lab at 90% yield and works in the fab at 60% yield is not a 50% cheaper product; it is an expensive experiment.
The timing matters. Intel has spent the past several years losing ground on leading-edge process nodes, watching customers and even its own products move to TSMC’s fabs. Packaging is a place where Intel has genuine expertise and a long patent history, and EMIB-T gives the company a differentiation story that does not depend on winning the race to the smallest transistor. It is a flanking move rather than a head-on charge.
For TSMC, the threat is real but distant. CoWoS capacity is being expanded aggressively to serve Nvidia, AMD, and the cloud giants, and the foundry’s customers have learned to design around its packaging roadmaps. A credible second source at half the cost would change the balance of bargaining power across the AI supply chain, but only if Intel can deliver the volume and yield that serious chipmakers require, and 2027 is far enough away for the incumbent to respond.
The customer question is the least discussed and most important part of the plan. Chip designers who use TSMC for manufacturing will not switch packaging to Intel unless the economics are overwhelming, because mixing foundry and packaging vendors adds logistics and qualification risk. Intel’s real market is its own products plus customers already committed to Intel fabs, which caps the near-term addressable base regardless of how good EMIB-T is.
Analysts said the deeper significance is directional. Intel has spent years being told it has no answer to TSMC, and a packaging roadmap with a cost claim attached gives the company something to sell to investors and foundry customers while the process-node story matures. Even a partial win in packaging would restore a slice of the credibility that has been bleeding away.
The competitive logic for AI chips also favors a second source. Every major accelerator customer would rather have two qualified packaging suppliers than one, and the AI buildout has repeatedly shown that single points of failure become crises when demand surges. If EMIB-T reaches production quality, it will be welcomed by the same buyers who complain about CoWoS shortages, regardless of the logo on the fab.
There is also a pricing question for the industry. A credible 50% cost alternative would put pressure on CoWoS pricing across the board, which is good news for chipmakers whose packaging bills have been rising in lockstep with AI demand. Lower packaging costs would not change the price of the chips themselves, but they would improve margins across the AI supply chain, and every point of margin in that chain is contested these days.
For now, the plan is a roadmap item with a number attached. The 50% figure will be tested in pilot production, then in customer qualification, then in the market, and each stage can kill the story as easily as confirm it. But Intel has finally staked out ground where the race is not about process nodes, and in the packaging business, being second with a cheaper answer is a position with real value.
The roadmap also answers a question investors have been asking about Intel’s foundry ambitions. Advanced packaging is one of the few services a foundry can sell that makes switching customers more attractive, because it bundles the manufacturing and the assembly into one qualified process. If EMIB-T delivers, it gives Intel Foundry a product it can pitch to AI chip designers who have no intention of putting their leading-edge silicon in Intel’s fabs but might happily put their packaging there.
