Inside Samsung Electronics’ foundry operations, the allocation has quietly shifted. People familiar with the company’s plans say Samsung has committed between 50 and 60 percent of its total 4nm wafer capacity to the base dies used in HBM4 memory, with shipments of the new memory generation set to increase substantially starting in the third quarter.
The disclosure, from company insiders and outside suppliers, offers the clearest picture yet of how seriously Samsung is treating the HBM4 ramp. The base die for the new memory uses Samsung’s SF4 process, its fourth-generation 4nm technology, and the company has been adding wafer starts since the middle of the year in preparation for volume production. Sources said the 4nm line is now running at full capacity, with the heavy allocation to HBM4 base dies expected to hold through the second half of the year.
The production decision reflects a technology shift that has redrawn the memory industry’s boundaries. High-bandwidth memory, the specialized stacked memory used in AI accelerators, has traditionally been a product of memory fabs alone. HBM4 changes that division of labor: its base die, the logic layer that sits beneath the stacked DRAM and manages data flow, is manufactured on an advanced logic process rather than a memory process. That puts foundry capacity at the center of a product Samsung’s memory division sells.
The shift also explains the intensity of the competition. Samsung is racing SK Hynix, the leader in high-bandwidth memory, and Micron, which has been closing the gap, for the business of supplying the chips that Nvidia and other accelerator makers will need for their next generations of hardware. HBM4 is expected to become the standard memory for the flagship AI accelerators entering production in the coming year, and whoever supplies it in volume stands to capture the most profitable part of the memory market.
For Samsung, the stakes are compounded by recent history. The company lost ground in the previous generation of high-bandwidth memory, watching SK Hynix establish itself as the dominant supplier to Nvidia while Samsung worked through qualification delays. Regaining that position requires not just a competitive product but demonstrated volume, and the decision to devote more than half of its advanced foundry capacity to HBM4 base dies is a direct answer to that requirement.
The economics of the decision are not obvious on their face. A 4nm foundry line can command high prices making logic chips for smartphones and data centers, and reserving the majority of that capacity for memory components ties up the company’s most advanced manufacturing for a single product line. Samsung’s calculation, according to people familiar with its thinking, is that HBM4 demand is strong enough, and pricing firm enough, to make the trade worthwhile.
The memory market’s broader condition supports that logic. Prices for DRAM have been climbing as AI demand absorbs capacity, and analysts have warned that shortages are worsening rather than easing. High-bandwidth memory consumes far more wafer capacity per bit than conventional DRAM, so every gigabyte of HBM shipped takes production away from the commodity memory that personal computers and servers also need. A company that locks down advanced capacity for HBM4 is positioning itself at the top of a supply chain where the scarce resource is not demand but wafers.
The timing matters as much as the allocation. Samsung’s customers for AI accelerators are planning their own production schedules around when HBM4 becomes available in quantity, and a supplier that ramps early can lock in design wins that persist for years. Sources said the company’s shipments will begin increasing from the third quarter, with the full force of the allocation showing up in the second half as production yields improve.
There are risks in the strategy as well. Samsung’s 4nm process serves a wide base of customers, from mobile chip designers to makers of networking silicon, and a sudden reallocation of half the capacity could strain relationships with foundry clients whose orders now face longer waits. Foundry customers typically sign agreements expecting steady capacity, and the memory push tests whether Samsung can manage both businesses when they compete for the same machines.
The shift also changes who designs the base die, and therefore who controls the interface between memory and accelerator. In earlier HBM generations, the base die was largely a memory company’s component, engineered to a standard specification. With HBM4, accelerator designers have pressed for more influence over the die, because the circuits that route data between stacked memory and a processor now shape how fast the whole system runs. Memory makers have pushed back, arguing that keeping the design in-house protects margins and production schedules. Samsung’s decision to build the base die on its own 4nm line is, in that sense, also a decision about control of the product’s most contested part.
The wafer arithmetic makes the bet larger still. Manufacturing high-bandwidth memory consumes several times the wafer area of conventional DRAM for the same quantity of bits, because the stacked chips require extra silicon for the connections and supporting circuitry that bind the layers together. Every slice of 4nm capacity Samsung dedicates to HBM4 base dies is therefore capacity that cannot serve any other customer, and the company is betting that the memory’s price and volume justify a commitment most foundries would hesitate to make.
For investors, the signals are unambiguous. Samsung’s willingness to commit advanced foundry capacity to memory signals its own forecast of where demand is strongest, and the memory sector’s share prices have responded accordingly. The test will come in the next two quarters, when shipment numbers will show whether the allocation produced volume, and whether the bet on HBM4 restored Samsung’s standing in the market it surrendered a generation earlier.
