Intel gave its data-center inference accelerator a product name and a customer sampling program on October 12, a small step in a long campaign to sell into a market its rivals already own.
At the Open Compute Project Global Summit in San Jose, the company said the chip known as Crescent Island would ship as the Intel GPU D series, with the first part called the D270. The card is built on the Xe3P architecture and carries 32 Xe cores and 256 XMX engines, giving it a theoretical 1.3 petaflops of FP8 compute. Intel lists a 350-watt envelope and memory bandwidth of 1.5 terabytes a second.
The number that stands out is memory. The D series supports up to 480 gigabytes of LPDDR5X, and Intel’s own reference card carries 160GB, with partners free to build larger versions. Capacity at that scale lets a single card hold a 300-billion-parameter model, and Intel says an eight-card system can serve a trillion-parameter model. The card is a standard PCIe Gen 5 add-in board, air-cooled, which matters to operators who have no appetite for redesigning racks around a new accelerator.
Memory capacity and memory bandwidth are different purchases, and Intel has chosen capacity. Nvidia’s current data center parts carry high-bandwidth memory, which moves data several times faster and costs several times more. Inference has two phases with opposite appetites: prefill, where the model reads a long prompt, is hungry for bandwidth, and decode, where it generates one token at a time, is hungry for capacity because every weight must be read for every token. Intel’s bet is that a large share of real serving work, especially long conversations with many users, is bound by capacity and by cost per token rather than by peak throughput.
AMD’s comparable card, the Instinct MI350P, is rated at 2.3 petaflops of FP8, well above the D270’s 1.3, and draws more power to do it. Intel is not trying to win that comparison. The company’s pitch is token throughput per dollar and per watt in the workloads customers actually run, which is a claim that can only be checked with benchmarks Intel has not published.
The software announcement may prove as consequential as the silicon. Intel says the D series runs on the same unified Xe software stack as its other accelerators and supports mainstream AI frameworks, and that it offers day-one support for Meta’s Muse Glimmer model. Shipping software support on launch day is the part of the accelerator business Intel has struggled with most: customers buy hardware they can already run, and a new chip that requires a rewrite is a new chip that waits.
The company’s history in this segment explains the caution around it. Its Gaudi accelerators won press attention and few large deployments, and Intel shelved the planned Falcon Shores follow-up before it reached customers. The D series is aimed at a narrower job, inference rather than training, where the software surface is smaller and the workloads repeat.
Inference is where the volume is heading, which is why Intel keeps spending on it. Training runs are concentrated among a handful of labs with the capital to buy tens of thousands of chips at a time. Serving models is distributed across every cloud, every enterprise and every consumer app, and the compute consumed there grows with usage rather than with research budgets. Analysts expect inference to take a rising share of data center spending, and the suppliers that win it will sell more units at lower margins.
Competition for that business is crowded. Nvidia sells inference parts by the rack, Google serves its own models on its own tensor chips, Amazon builds accelerators in house, and Broadcom designs custom silicon for the largest cloud operators. The D series enters as the option for buyers who want a standard card, a familiar interface and a price that undercuts the incumbent, which is a real market even if it is not the largest one.
The venue Intel chose says something about how it intends to sell. The Open Compute Project is where hyperscalers publish hardware designs so that multiple vendors can build them, and Nvidia submitted its next-generation Vera Rubin rack and compute tray designs to the same organization on the same day. Standard parts and open specifications suit buyers who do not want their data center shaped by a single supplier, and Intel is positioning the D series as the inference card that fits a specification rather than creating one.
Two things are missing from the announcement. Intel gave no ship date beyond the start of customer sampling and no price, which leaves the cost-per-token claim unverifiable for now. Sampling means a few customers have hardware and can run their own tests, and it is at that stage that disappointing bandwidth figures tend to surface. A card with 1.5 terabytes a second will handle long-context serving less gracefully than a card with four or eight times that, and customers with mixed workloads will notice.
What to watch is narrow and specific. Whether Intel names a public cloud or a large enterprise willing to serve production traffic on the D270, how the card’s price compares with an H200-class part purchased in volume, and whether the Xe software stack reaches parity with CUDA on the frameworks serving teams actually use. A design win at one hyperscaler would count for more than any specification on stage in San Jose.
Intel has made the accelerator bet repeatedly and has yet to convert it into share. The D series is a more modest aim than the plans it replaced, and a more plausible one: name the part, ship the samples, and let customers measure whether a memory-heavy, power-light card produces cheaper tokens than the alternative.
